As microelectronic packaging technology advances for higher device performance, thin core, thin die technology solutions may be employed. Cost reduction, solder joint reliability and Z height requirements are important concerns. Package warpage, which in some cases may be related to interconnect joint (i.e., the interface between an interconnect structure and another surface, such as a substrate or contact pad) failures have been observed in many types of packaging assemblies, such as in ball grid array (BGA) assemblies.